1. Field of the Invention
The present invention relates to a power conversion controller, and more particularly to a power conversion controller capable of providing power factor correction for power conversion applications requiring load current regulation.
2. Description of the Related Art
FIG. 1 illustrates a power conversion application, in which a prior art controller 100 having a power factor correction mechanism is used to control a power conversion circuit 110 such that the waveform of an input current IIN of the power conversion circuit 110 is analog to that of a line voltage VLINE, and the average of the input current IIN is regulated to result in a DC output voltage VO for a load 120. As can be seen in FIG. 1, the controller includes a combiner 101, an amplifier 102, a multiplier 103, and a gate drive signal generation unit 104.
The combiner 101 is used to generate an error signal by subtracting VO with a reference voltage VREF. The amplifier 102, having a high DC gain and a cutoff frequency below 120 HZ, is used to amplify the error signal with a negative gain to generate an amplitude adjusting signal A.
The multiplier 103 is used to multiply the line voltage VLINE with the amplitude adjusting signal A to generate a reference current signal SREFC.
The gate drive signal generation unit 104 is used to generate a gate drive signal VG to control the switching of the power conversion circuit 110, wherein the duty of the gate drive signal VG is determined according to a voltage comparison of the reference current signal SREFC and a current sensing signal SCS, which represents the input current IIN.
When in operation, the current sensing signal SCS will follow the reference current signal SREFC, and the negative feedback mechanism will force VO to approach VREF. As such, if the line voltage VLINE is changed to a higher/lower level, the amplitude of the reference current signal SREFC will be adjusted by the amplitude adjusting signal A to a smaller/larger value to result in a lower/higher level of the current sensing signal SCS so as to regulate VO at VREF. That is, the reference current signal SREFC, of which the waveform is analog to that of the line voltage VLINE, and of which the amplitude is equal to the product of the amplitude adjusting signal A and the amplitude of the line voltage VLINE, is the key signal for achieving power factor correction and output voltage regulation at the same time.
However, there is a major disadvantage in this architecture—the amplifier 102 occupies a large area due to the required high gain and low cut-off frequency.
In view of this problem, the present invention proposes a power conversion controller having a novel power factor correction mechanism for power conversion applications.